Parallel Programming and Optimization with Intel Xeon Phi Coprocessor

The Center for Simulation and Modeling is pleased to announce two part workshop on parallel programming and optimization with the Intel Xeon Phi Coprocessor.  Each part is a one day workshop with lunch provided.  Any attendee wishing to attend the second part of the workshop must have registered and completed the first part.  Details below.


Event Details: CDT 101 (click to register for day one)

Tuesday, April 28, 2015
Registration Begins: 9:00 AM
Presentation: 9:30 AM to 4:30 PM
Lunch will be provided


Event Details: CDT 102 (click to register for day two)

Wednesday, April 29, 2015
Registration Begins: 9:00 AM
Presentation: 9:30 AM to 4:30 PM
Lunch will be provided


Location:

University of Pittsburgh
Chevron Science Center
Room 150
219 Parkman Ave
Pittsburgh, PA 15213


About:

Space is limited … register early!

This one-day training provides software developers the foundation needed for modernizing their codes to extract more of the parallel compute performance potential found in both Intel® Xeon® processors and Intel Xeon Phi coprocessors.

These sessions will cover:

  • Intel Xeon Phi architecture: purpose, organization, pre-requisites for good performance, future technology
  • Programming models: native, offload, heterogeneous clustering
  • Parallel frameworks: automatic vectorization, OpenMP, MPI
  • Optimization methods: general, scalar math, vectorization, multithreading, memory access, communication and special topics